1. Field of the Invention
The present invention relates to an operational amplifier, and in particular, to a chopper-stabilized operational amplifier in which input signal pairs are modulated by a first chopper to be amplified in a signal processing path configured by one or more differential amplifier stages, and the amplified modulated signals are demodulated by a second chopper for output.
2. Description of the Related Art
There is an advantage in creating an analog circuit and a digital circuit on the same integrated circuit (IC) chip in terms of reduction in the cost of a system. However, implementing the digital and analog circuits together on the same IC chip adds the constraints imparted to the analog circuit design. One of such constraints is decrease in an operating voltage range resulting from supply voltage scaling. In other words, when supply voltage scaling is necessary to scale down the device size in digital circuits, an input voltage range of the analog circuit would be significantly limited without reducing a threshold voltage.
As one of the traditional techniques for solving this problem, the folded-cascode operational amplifiers have been widely known conventionally (e.g., see Non-Patent Document 1). This type of operational amplifier has a circuit configuration in which, as shown in the circuit diagram of FIG. 7, a first differential pair including PMOS transistors M2a and M2b as input transistors whose sources are connected commonly to a high supply voltage VDD via a source and drain of a PMOS transistor M1, and a second differential pair including NMOS transistors M3a and M3b as input transistors whose sources are connected commonly to a low supply voltage VSS via a source and drain of an NMOS transistor M4 are used complementarily.
This conventional operational amplifier operates effectively under the condition that satisfies:VDD−VSS>|VT,m2|+Vov,m1+VT,m3+Vov,m4  (1)where, in Formula (1), VT,m2 denotes a threshold voltage of the PMOS transistors M2a and M2b, VT,m3 denotes a threshold voltage of the NMOS transistors M3a and M3b, Vov,m1 denotes a gate overdrive voltage of the PMOS transistor M1, and Vov,m4 denotes a gate overdrive voltage of the NMOS transistor M4.
Non-Patent Document 1: Ron Hogervorst, John P. Tero, Ruud G. H. Eschauzier, and Johan H. Huijsing, “A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries”, IEEE Journal of Solid-State Circuits, Vol. 29, No. 12, pp. 1505-1513, December 1994.